This invention relates to single layer capacitors, and more particularly, to high capacitance single layer ceramic capacitors and a method of making the capacitors.
Single layer ceramic capacitors have a useful form factor for assembly into electrical circuits which are present on printed circuit boards or integrated circuits within chip carriers or other packages where space is limited. Dimensions of the ceramic capacitor can be matched with the limitations within the printed circuit board or chip carrier holding the integrated circuit. Typically the bottom surface of a ceramic capacitor is soldered to or connected with conductive epoxy to the surface of the printed circuit board and the top face of the ceramic capacitor presents one or more electrically conductive pads that serve as another circuit connection end point. Typically, single layer ceramic capacitors are produced by metallizing two faces of a thin sheet of sintered ceramic material. The metallized ceramic shield is then cut to size by sawing or abrasive cutting techniques. While the form factor of these capacitors is desirable, the amount of capacitance that can be achieved limits their usefulness in certain applications, particularly when design considerations require particularly small or particularly thin capacitors. In such circumstances, the capacitor does not have sufficient structural strength to withstand undesirable fracturing or chipping during routine handling during assembly into circuits. Consequently design tradeoffs must be made between using thicker ceramic layers for greater strength and thinner ceramic layers for greater capacitance.
Prior attempts to achieve higher capacitance in a single layer capacitor while maintaining structural strength include using a flat, horizontal capacitor with metallization on its lower side having a gap. The problem with this design is that it creates unwanted resonances at frequencies above a few gigahertz. Another approach has been to use standing dielectric chips with opposed metallized surfaces and with metal leads attached to the respective surfaces. Problems with this design is that leads are fragile and require extreme care during fabrication, shipping, handling and soldering in place to traces. In addition, standing leaded capacitors produce significant signal resonances, especially for frequencies above a few gigahertz. Further attempts to produce higher capacitance single layer capacitors include multi-layer materials laminated together. These multi-layers include a ceramic dielectric material and a ceramic/metal composite material sheet. A problem with this design is that the manufacturing process includes laminating sheets together and the ceramic/metal composite material is quite expensive. Yet another ceramic capacitor design includes at least one interior metallization plane or plate and a multiplicity of vias performing multiple redundant electrical connections within the capacitor. Such designs are extremely difficult to manufacture to provide for interior metallization planes or plates connected through a multiplicity of vias.
Consequently, a need exists for a high capacitance single layer ceramic capacitor which is inexpensive and easy to manufacture.